Layout Design Engineer

An Analog Layout Designer is expected to work in a team and cooperate with another analog layout designer in order to work on the development and verification of high-quality layouts for high-performance analog mixed-signal integrated circuits including RF circuits, high-speed interfaces, power management, and advanced data converters on deep sub-micron technologies such as CMOS, SOI, and FinFET using custom IC tools. 

• Learn how to Extract and summarize vital and helpful information from technical documents.
• Work closely with the design team throughout the design cycle to gather all the design requirements and layout constraints.
• Develop skills for cell-level IC layout using custom IC layout tools.
• Learn how to Estimate block-level area, and do floor plans while considering the appropriate layout effects.
• Learn how to Implement block-level routing while monitoring interconnects parasitic, reliability, and manufacturability.
• On the block level, develop physical verification skills (LVS/DRC/Antenna/EMIR/PERC/PEX).
• Sign off the final layout design (Block-level) while meeting all the requirements and quality metrics.
• Developing scripts using programming languages such as Tcl, Perl, and the shell is a plus.
• Apply the layout process effectively to ensure the application of layout design best practices.