Senior ASIC Verification Engineer

Mixel - Sheraton, Cairo

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Experience Needed:
3 to 6 years
Career Level:
Experienced (Non-Manager)
Job Type:
Full Time
Education Level:
Bachelor's Degree at least
1 open position
About the Job
  • Develop test plan from specification and architect system level verification environments.
  • Develop test-bench components, and coverage metrics.
  • Execute RTL/Gate level simulations and analyze results.
  • Work with the mixed signal team on the co-simulation and verification of mixed-signal IPs.
  • Contribute to design/verification process automation.
Job Requirements
  • B.Sc. or M.Sc. in Electronics/Computer Engineering.
  • 3-6 Years of experience in developing SV-based verification environments.
  • Strong knowledge of Verilog, System Verilog, and object-oriented programming languages.
  • Knowledge of at least one standard verification methodology such as VMM, OVM, or UVM.
  • Familiarity with RTL design, synthesis, and CDC analysis is a plus.
  • Oral and written fluency in English.
  • Working knowledge of shell, Perl, and TCL scripting.
  • Knowledge of Unix/Linux operating system.
About this Company

Mixel is a leading provider of mixed-signal mobile IPs. We offer a wide portfolio of high-performance mixed-signal connectivity solutions.

Mixel, Inc. is privately held and located in Silicon Valley, USA. Founded in 1998, Mixel’s purpose has always been to... (More)

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