Job Details
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Job Description
- Work with the design team to plan the DFT infrastructure.
- Perform DFT different implementations like SCAN , Memory BIST and JTAG.
- Work with the design team to resolve any DRC issues.
- Work with the design team to increase test coverage and increase observability and controllability.
- Work on ATPG pattern generation and simulation.
- Develop efficient DFT flows
Job Requirements
Education
- B.Sc. / M.Sc. in Electronics Engineering
Years of Experience
- 0 - 3 years of experience
Other Knowledge/ Studies
- Oral and written fluency in English
- Microsoft office
- Excellent Knowledge of IC ASIC design flow
- Excellent Knowledge of digital design
- Excellent Knowledge of Verilog
- Knowledge about timing analysis
- Knowledge about ATPG flow
- Scripting knowledge (Perl/Python/TCl/Shell Script)
- Preferable knowledge of DFT different implementation concepts
- Preferable knowledge of DFT flow tools ((e.g TetraMAX, DFTMAX, VCS, PrimeTime or equivalent )
Abilities
- Self-driven and Motivated
- High communication skills
- Detailed Oriented
- Ownership and dedication
