- University degree in Electronic or Computer Engineering
- Minimum 2-4 years of digital ASIC or FPGA design experience depending on the position
- Experience in VHDL and/or Verilog design and simulation
- Front-end tools experience (Synopsys, Cadence and/or Mentor’s) and flow experience are highly desired including verification, simulators, synthesis, STA, DFT/ ATPG/RAMBIST, back-annotation and gate simulation.
- Experience with backend tools and flow as well as with floor planning or with coordinating with the backend team is essential.
- Highly motivated and independently driven.
- Excellent command of English (verbal and written).
- Strong communication and interpersonal skills.
- Experience with firmware development or interfacing with the firmware team is a strong plus.
- Experience with DSP algorithm, communications concepts and building blocks is a strong plus.
- Hands-on experience with scripting (csh, Tcl/Tk, Perl,… etc).
- Hands-on experience with debugging hardware issues using scopes and logic analyzers with good analytical and debugging skills.
- Ability to work with global, cross-functional teams is a strong plus.
- Having project management skills is a strong plus.
About this Company
Goodix Egypt located in Cairo, Egypt is a newly incorporated subsidiary of China’s Shenzhen Goodix Technology Co., Ltd. with a mandate to grow a highly talented team of engineers to develop state-of-the-art and industry-leading semiconductor system solutions including both...
See all Careers and Jobs at Goodix