Job Details
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Job Description
- Develop a thorough understanding of system-level design specifications.
- Derive digital design life-cycle from concept phase to product realization.
- Develop verilog RTL for complex high speed digital blocks.
- ASIC/FPGA Synthesis of the digital part of Mixed Signal IPs.
- Develop behavioral models for the analog parts of Mixed Signal IPs.
- Develop advanced verification environment and test-bench components.
- Hardware verification of the digital module using cutting edge FPGA kits.
- Contribute to internal design reviews to ensure compliance to the company ASIC design process.
- Support post silicon bring-up and validation activities.
Job Requirements
- Minimum 8 years of Experience.
- B.Sc. or M.Sc. in Electronics Engineering.
