ASIC Physical Design Manager

Si-Vision - Sheraton, Cairo

5
Applicants for
1 open position
3
Seen
Experience Needed:
More than 8 years
Career Level:
Manager
Job Type:
Full Time
Salary:
Confidential, + Bonus
Education Level:
Bachelor's Degree at least
Languages:
Arabic, English
Vacancies:
1 open position
About the Job
  • Build & Manage a growing ASIC Physical Design team.
  • Work with diverse global teams and lead projects to closure.
  • Develop project plans and follow-up on implementation to ensure quality of design and on-time delivery of outputs.
  • Ensure customer satisfaction in order to grow the business through direct communication with customers, presentations & successful delivery of projects milestones.
  • Responsible for employees training, development plans, performance management, etc.
  • Responsible for handling technical issues and for guiding the team to resolve these issues.

Job Requirements
  • B.Sc., or M.Sc., in Electronics Engineering.
  • Management certification or MBA is a plus.
  • Previous experience in leading and managing people.
  • Excellent communication and negotiation skills.
  • Self-driven, self-Motivated and ambitious.
  • Excellent verbal and written communication in English.
  • Excellent problem solving and analytical skills.
  • Ability to deal with customers from different nationalities.
  • International mindset.
  • Proven record of delivering physical design projects and automation in physical design.

Previous hands-on experience in;

  • ASIC Physical Design RTL to GDSII Implementation flow.
  • Physical design implementation (floor-planning, Placement, Routing, CTS, STA) in advanced technologies.
  • Understanding complex logic structures and define new IPs targeted at performance and/or area
  • STA tool and timing closure methodologies
  • Power grid analysis. Understand trade-off between power, performance and area
  • Clock tree implication and in-depth understanding of different CTS structures like clock mesh and multi-source CTS
  • Physical design verification tasks include creating setup and scripts for DRC, LVS, Antenna and density checks, report generation, analysis, debug and implementing the fixes in the physical design database.
  • DFM checks for the advanced node designs
  • Synthesis and Design for Testability (DFT) flow
  • Low power design closure UPF based implementation
  • Timing .lib generation
  • Using Synopsys tools and flows
About this Company

Si-Vision has been in business since 2007, with more than 400 years of collective experience and serving Tier-1 customers all over the globe. The Silicon Vision team has broad experience in RF Circuits and Systems, Digital and Backend Designs.

In July 16, 2015... (More)

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