Youstina Maher
ASIC Verification Engineer at Mixel-Egypt
Heliopolis, Cairo, Egypt- RTL Design
- PnR using IC Compiler
- VHDL
- Digital Design Flow using Alliance tools
- Formal Verification using Formality
Work Experience
Education
- Ain Shams University (ASU)Jan 2014 to Jan 2019 · 5 Years
BSc in Communication and Systems Engineering
- New Ramses College Jan 2014
High School - Thanaweya Amma
Activities
- Sep 2016 to Jun 2017 · 9 Months
Student Activity
Academic Committe Member at Catalysis
Achievements
-GPA of 3.92 (Distinction with Honors) -Dean's List Student at Faculty of Engineering, Ain Shams University (10 semesters, entire duration of my study)
Skills
Tools and Fields of Expertise
- RTL Design
- PnR using IC Compiler
- VHDL
- Digital Design Flow using Alliance tools
- Formal Verification using Formality
- Programming in C
- Programming in C++
- Raspberry Pi
- MATLAB and Simulink
- Verilog
- SystemVerilog
- Scripting using Tcl
- Technical Writing
- Peer and Non-Peer Tutoring
Languages
Arabic
FluentEnglish
FluentFrench
IntermediateGerman
Beginner
Training & Certifications
Mentor Analog IC Design to Tape-out
Mentronix·2017MATLAB
Ain Shams University·2016Digital Marketing and SEO
Shaw Academy·2016Supply Chain Management
MECA·2015DELF A2
French Ministry of Education·2009