Basic Info

Omar Amin

Less than 1 year

Alexandria, Egypt

Bachelor's Degree

Entry level

Work Experience

Graduation Project | Run Time Verication methodology Based on system verilog assertions synthesis with mutation based auto-correction at Mentor Graphics

Experience Details

Graduation Project | Run Time Verication methodology Based on system verilog assertions synthesis with mutation based auto-correction

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

## Worked on the methodology synthesizing Systemverilog assertions to FPGA platform used for run time verication using Dynamic partial recongurations.
## By inserting assertions in the verilog design want to be veried as golden model and convert the implemented assertions by our compiler to synthesized verilog design.
## Divide the asserted design on the FPFG to implement the assertions on the static part while the design on the dynamic part to be able to replace it if there is any error detected by the assertions using mutations.
## Using TCL and perl scribets to control the bit stream generated to FPGA with the corrected mutation.
** Responsible for Built up the SystemVerilog Assertions Synthesis Compiler using Perl scripts and develop it using GUI interface showing the translation steps and to be easily used.
** Responsible for the interface of FPGA data memory and clock synchronization with the design and the mutation process.


Company Details

Mentor Graphics (multinational)

Cairo, Egypt

N/A

Electronics and Semiconductors, Computer Hardware

https://www.mentor.com/

Apr 2015 to present (1 year 8 months)
Graduation Project | SystemVerilog Assertions Synthesis based Compiler at Mentor Graphics

Experience Details

Graduation Project | SystemVerilog Assertions Synthesis based Compiler

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

##The Compiler used for translating system verilog files contains assertions to verilog files contains synthesized modules make the function of assertions.
## The proposed compiler uses several Perl scripts, to read the assertion sequences and property, then brings the appropriate module from a pre-designed list of Verilog modules for each operator according to the sequence/ property used operator, and finally interconnects modules in the right order,while developing the required Verilog/ Perl files.
** Responsible for implementing Relational operators of concurrent assertions into verilog synthesized modules.
** Responsible for Creating generic Perl scripts to pares the sequences lines into each verilog modules after modifying it according each operant detected.
** Responsible for merging each property and sequence with it's modules using Perl scripts.
** Responsible for implementing assertions as system verilog and translating it using the compiler to compare between the two results and to prove our compiler eefficiency; As we use AES(128 bit Advanced Encryption) pip-lend architecture and SPI protocol to set up our results on them.
** Accepted as WIP in DAC conferance 2016 (paper ID 203-LT168) .


Company Details

Mentor Graphics (multinational)

Cairo, Egypt

N/A

Electronics and Semiconductors, Computer Hardware

N/A

Oct 2015 to present (1 year 2 months)
Volunteer In E-WEB Organization (volunteer) at ENGINEERING WEB Nonprofitable Organization

Experience Details

Volunteer In E-WEB Organization (volunteer)

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

# Now Member in the Public Relation Committee.
# Past Member in Activities,Registration, and Human Resources.


Company Details

ENGINEERING WEB Nonprofitable Organization

Alexandria, Egypt

N/A

Non-Profit Organizations

https://www.facebook.com/EngineeringWeb/timeline

Jan 2012 to present (4 years 11 months)
Volunteer In AYB , Alexandria Section (volunteer) at Alashanek ya balady (AYB)

Experience Details

Volunteer In AYB , Alexandria Section (volunteer)

Hospitality/Hotels/Food Services

Student

# Member in the Public Relation Committee.
# Helping disable and poor peoples


Company Details

Alashanek ya balady (AYB)

Alexandria, Egypt

N/A

Non-Profit Organizations

http://www.ayb-sd.org/ayb2/

Feb 2015 to present (1 year 10 months)
SystemVerilog For Verification Training (intern) at VLSI-Egypt | Alexandria section

Experience Details

SystemVerilog For Verification Training (intern)

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

# This training aims to teach System on Chip design verification concepts,Coding in System Verilog language for verification,How to build verification environment for complex designs.
# its goal Learn important concepts in SOC/ASIC/FPGA/VLSI design verification,Be able to code, simulate and verify in System Verilog language using good simulator and to be qualified for a Verification/design graduation project/Job.
# Along this training there are a few labs in each section the system veilog from WHDL labs as a practice
# The final project is to built up a verification environment for UART hardware communication protocol.


Company Details

VLSI-Egypt | Alexandria section

Alexandria, Egypt

N/A

Electronics and Semiconductors, Computer Hardware, Computer Software

http://www.vlsiegypt.com/home/

Aug 2015 to Oct 2015 (2 months)
Project Management of Electric Week 2015 (volunteer) at ENGINEERING WEB Nonprofitable Organization

Experience Details

Project Management of Electric Week 2015 (volunteer)

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

# In this year the conference focus on the technical parts in each electrical filled and the speakers are mainly from professional companies and their topics in the core of their work.
# I am the Team leader and responsible for dealing with sponsors,speakers,
Putting the plan of marketing, and plan of registration, logistics in the Halls
we organize.


Company Details

ENGINEERING WEB Nonprofitable Organization

Alexandria, Egypt

N/A

Non-Profit Organizations

https://www.facebook.com/Electricweek/

Feb 2015 to Jul 2015 (5 months)
Coffee Can Radar (MIT Student Project) (intern) at Egypt-Japan University of Science and Technology (E-JUST)

Experience Details

Coffee Can Radar (MIT Student Project) (intern)

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

# This project was taken from MIT institute aims to lean the basics of RADAR system with very low cost as possible.
# Our goal is to create a laptop based low-cost, low-power range-Doppler imag-ing system based on an existing coffee can cantenna design. The actual radar hardware is based on an existing design that is currently being used in a Massachusetts Institute of Technology Lincoln Laboratory Opencourseware course.
# The existing design sends analog radar data to a PC via the audio line-in port. The data is saved on the PC as a .wav le. The user can then process the data using a MATLAB script to display range and velocity measurements. A problem with this set-up is that the data cannot be processed in real time. The user must record data, save the data, then process the data at a later time.
# Our project is to solve this issue by implementing real time data acquisition and signal processing for the radar. The final system shall be capable of plotting, in real time, the range vs. Time, and Doppler (or Velocity) vs. Time spectrum of moving targets at ranges that vary between 0-100m.
** My roll in this project is to set up the radar hardware PCB and test in the
university labs before connected it to PC.


Company Details

Egypt-Japan University of Science and Technology (E-JUST)

Alexandria, Egypt

N/A

Electronics and Semiconductors, Computer Hardware

http://ejust.edu.eg/main/index.php

Jun 2014 to Oct 2014 (4 months)
Creative Minds-Digital - VLSI Egypt (intern) at VLSI Egypt

Experience Details

Creative Minds-Digital - VLSI Egypt (intern)

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

# This program aims to increase the knowledge of Digital design to the partici-pants through detailed schedule and deliver assignments each week under the supervision of Dr Magid Gonima(Sr. VLSI Design Engineer at NVIDIA Cor-poration)
# In This program, I learn ; Modern digital systems design flow,Verilog HDL,Timing analysis and performance measures and Configurable logic devices.
** In the final we implement "Voice over a shared channel" using FPGA-Artix7, in with the voice digitalized from A/D converter,then transmit data in packets over the shared bus,and receive it using UART,send received data to D/A converter to recreate sound.


Company Details

VLSI Egypt

Cairo, Egypt

N/A

Electronics and Semiconductors, Computer Hardware

http://www.vlsiegypt.com/home/?forum=creative-minds-digital

May 2014 to Aug 2014 (3 months)
Digital Design Training Program (intern) at Egypt-Japan University of Science and Technology (E-JUST)

Experience Details

Digital Design Training Program (intern)

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

## Learned the basics of Digital VLSI Design for Systems On Chip (SOC), Verilog HDL, and worked on ALTERA FPGAs in the university labs; under the super vison of Dr Ahmed Shalaby(Postdoctoral Research Fellow) and Dr Mohamed Morsy (Assistant Professor at Alexandria University, Faculty of Engineering)
## A Hardware implementation of SBqM™ architecture which do some specification in a bank.
** My Roll is to implement FSM in the architecture in Verilog and built up a testbench with verilog to verify verify the operation of the SBqM™ model.

## A Hardware implementation of 128 bit Advanced Encryption Standard counter mode (AES-CTR) using Verilog HDL.
** My Roll is to implement the Mix couloms block in the architecture taking in consideration that the design must be pipeline and each block give its results in specified number of clocks to avoid delay and wrong values


Company Details

Egypt-Japan University of Science and Technology (E-JUST)

Alexandria, Egypt

N/A

Computer Hardware, Electronics and Semiconductors

http://ejust.edu.eg/main/index.php

Jan 2014 to Feb 2014 (1 month)
Project Management of Electric Week 2013 (volunteer) at ENGINEERING WEB Nonprofitable Organization

Experience Details

Project Management of Electric Week 2013 (volunteer)

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

# The main Purpose of electric week to give the students in six days all about the new skills even in the electrical or computer technology, or soft skills.
# I was responsible in this event for dealing with sponsors, Putting the plan of
marketing, and plan of registration.


Company Details

ENGINEERING WEB Nonprofitable Organization

Alexandria, Egypt

N/A

Non-Profit Organizations

https://www.facebook.com/Electricweek/

Feb 2013 to Aug 2013 (6 months)
Quad Copter at Faculty of Engineering (student activity)

Experience Details

Quad Copter

Engineering - Mechanical/Electrical, Engineering - Telecom/Technology

Student

# This project was practical application on Digital academic course in the first electrical year using basic logic gates(TTL Family).
# Using combination of logic gates to control the quad copter to fly up and keep balancing using gyroscope sensor
# Using frame of our design , brush-less DC motors ,Electric speed controller to control the speed of motors and our hardware discrete design to achieve our goal to fly the quad-copter without using any Micro controllers.


Company Details

Faculty of Engineering (student activity)

Alexandria, Egypt

https://std.eng.alexu.edu.eg/

Jul 2013 to Jul 2013 (1 month)

Education

B.Sc in Communications and Electronics

Education Details

B.Sc

Communications and Electronics , Electrical Engineering

Alexandria University - Faculty of Engineering, Egypt

C / Good / 65 - 75%

N/A

N/A

Alexandria University - Faculty of Engineering
2011 - 2016
High School - Thanaweya Amma

High School Details

Thanaweya Amma

EL-Sahwa

Egypt

2011

A / Excellent / 85 -100%

N/A

EL-Sahwa
2011

Certifications

Certificate details

Conversation English

Oct 2016

N/A

N/A

N/A

New Horizons

N/A

Certificate details

English language-Concersation

Oct 2011

N/A

N/A

N/A

London College of Linguistics

N/A

Training and Courses

Training/Course Details

Electrical and Control equipments

Jul 2014

AMOC

N/A

Training/Course Details

Digital Design Training Program

Feb 2014

Egypt-Japan University of Science and Technology (E-JUST)

# Learned the basics of Digital VLSI Design for Systems On Chip (SOC), Verilog HDL, and worked on ALTERA FPGAs in the university labs. # A Hardware implementation of 128 bit Advanced Encryption Standard counter mode (AES-CTR) using Verilog HDL.

Training/Course Details

توسعة مجال الادراك

Jul 2007

مركز رؤية للادارة و التنمية البشرية

N/A

This profile is fresh!
Last update 4 days ago.

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Profile Skills and Keywords

????? ???? ???????AdaptiveArabicAssembly LanguageC ProgrammingCoffee Can Radar (MIT Student Project)Communications And ElectronicsComputer ArchitectureComputer HardwareComputer SoftwareConversation EnglishCreative Minds-Digital - VLSI EgyptCryptogra- PhyDesign CompilerDigital DesignDigital Design Training ProgramDigital VLSI DesignDigital VerificationElectrical And Control EquipmentsElectrical EngineeringElectronics And SemiconductorsEnglishEnglish Language-ConcersationFishingFlexibleFood ServicesFrenchFunctional Hardware Verication MethodologiesGermanGraduation Project | Run Time Verication Methodology Based On System Verilog Assertions Synthesis With Mutation Based Auto-correctionGraduation Project | SystemVerilog Assertions Synthesis Based CompilerHard WorkerHospitalityLatexLeaderMatlabMentor GraphicsMentor Graphics Model-SimMentor Graphics Questa-SimMethodologiesNon-Profit OrganizationsOrganizerPerlProblem SolverProject Management Of Electric Week 2013Project Management Of Electric Week 2015ProteusQuad CopterReadingScriptingShell ScriptingSwimmingSystem VerilogSystemVerilog For Verification TrainingVHDLVerication MethodologiesVerilog HDLVivado Design SuiteVolunteer In AYB , Alexandria SectionVolunteer In E-WEB OrganizationXilinx ISE

Self-assesed Skills

Languages

Arabic

Arabic

: Fluent

: Fluent

: Fluent

: Fluent

English

English

: Advanced

: Advanced

: Advanced

: Advanced

German

German

: Intermediate

: Beginner

: Beginner

: Beginner

French

French

: Beginner

: Beginner

: Beginner

: Beginner

Tools and Technologies

Verilog HDL

Verilog HDL

: Expert

: Extreme - I love it!

:

1-3 years

Perl

Perl

: Expert

: Extreme - I love it!

:

Less than 1 year

Mentor graphics model-Sim

Mentor graphics model-Sim

: Expert

: Extreme - I love it!

:

1-3 years

Xilinx ISE

Xilinx ISE

: Expert

: Extreme - I love it!

:

1-3 years

Mentor graphics Questa-Sim

Mentor graphics Questa-Sim

: Expert

: Extreme - I love it!

:

1-3 years

Vivado Design Suite

Vivado Design Suite

: Expert

: Extreme - I love it!

:

Less than 1 year

VHDL

VHDL

: Advanced

: Medium

:

Less than 1 year

C programming

C programming

: Advanced

: High

:

1-3 years

Matlab

Matlab

: Advanced

: Medium

:

1-3 years

System Verilog

System Verilog

: Advanced

: Extreme - I love it!

:

Less than 1 year

Shell Scripting

Shell Scripting

: Advanced

: High

:

Less than 1 year

Latex

Latex

: Advanced

: High

:

Less than 1 year

Assembly language

Assembly language

: Advanced

: High

:

1-3 years

Design Compiler

Design Compiler

: Intermediate

: High

:

Less than 1 year

Proteus

Proteus

: Intermediate

: Medium

:

Less than 1 year

Fields of Expertise

Scripting

Scripting

: Expert

: Extreme - I love it!

:

Less than 1 year

Digital Design

Digital Design

: Advanced

: Extreme - I love it!

:

1-3 years

Digital Verification

Digital Verification

: Advanced

: Extreme - I love it!

:

1-3 years

Key Skills

Leader, Hard worker, Organizer, Problem Solver, Flexible / Adaptive

Online Presence

https://www.linkedin.com/in/omar-amin-0369395a?trk=nav_responsive_tab_profilehttps://www.facebook.com/omar.amin.1042https://twitter.com/omaramin19993

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