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Job Description
- Study the assigned block, analyze the circuit carefully, and work on the hand analysis.
- Understand the required performance, the targeted specs and trade-off between different performance metrices.
- Prepare a concept review covering the detailed circuit and testbenches explanation.
- Write behavioral model of the circuit blocks for system-level simulations.
- Simulate and verifying designed schematics using Synopsys tools using circuit simulators.
- Debug to find out the root cause for any performance degradation.
- Being capable of solving all the faced issues.
- Working with layout team on layout optimization.
- Evaluate post layout performance using extraction tools (ICV and Calibre).
- Understand the interface with other blocks (if any) and work with other team members to optimize the interface.
- Coordinate and handling top-level simulations.
- Develop verification plans for RF / Analog building blocks.
- Develop and executing characterization plans of the designed blocks, systems, and chips.
- Check the design reliability (EM/IR/Aging).
- Do timing models using custom static timing analysis tools.
- Deliver the corresponding documentation as per the design process.
- Conduct customer meetings and communicating with customers on the assigned requests.
- Conduct design review meetings.
- Coach and monitoring junior engineers
- Contribute in process formulation and/or improvement.
- Help in system top-level schematics creation.
- Build system top-level verification test benches.
- Contribute by technical opinion (if possible) in design reviews conducted by others.
- Share technical expertise with other team members
Job Requirements
Education
- BSc. degree in Electronics Engineering
- MSc. degree in Electronics Engineering is a plus
Years of Experience
- 3+ years of experience in analog and mixed-signal IC development
Other Knowledge/ Studies
- Deep understanding of analog design concepts and trade-offs between area, power, noise and/or mismatch
- Deep knowledge of one of the following CMOS circuits: op-amps, voltage regulators, bias circuits, oscillators, low-noise amplifiers, active filters, analog-digital conversion, phase-locked loops, high-speed interfaces or any relevant circuits
- Good knowledge of timing concepts
- Good knowledge of analog layout techniques
- Good knowledge of EM/IR simulation
- Basic knowledge of EM simulation is a plus
Skills
- Oral and written fluency in English
- Excellent knowledge of Microsoft Windows, Word, PowerPoint, Excel
- Good knowledge of Linux environment and shell commands
- Basic knowledge of scripting language
- Excellent knowledge of design/simulation tools such as Synopsys, Cadence and/or Mentor tools or any relevant tool
- Good knowledge of any EM simulation tool is a plus
- Good knowledge in behavioral modeling (Verilog, Verilog AMS) is a plus
- Very Good knowledge of custom timing static analysis tool (Synopsys NanoTime, Synopsys SiliconSmart)
Soft Skills
- Excellent problem solving and analytical skills
- Ability to propose solutions, design enhancements, process enhancement independently, as well as be a key team player
- Excellent communication skills