Job Details
Experience Needed:
Career Level:
Education Level:
Salary:
Job Categories:
Skills And Tools:
Job Description
- Digital logic design background is required.
- Ability to understand complex logic structures and define new IPs targeted at performance and/or area
- STA tool and timing closure methodologies
- Power grid analysis. Understand tradeoff between power, performance and area.
- Low-power implementation methods: CLP, power and IR drop reduction methods.
- Physical design verification tasks include creating setup and scripts for DRC, LVS, Antenna and density checks, report generation, analysis, debug and implementing the fixes in the physical design database.
- DFM checks for the advanced node designs.
- Programming and scripting skills (Shell, Tcl, and/or Perl).
- Synthesis and Design for Testability (DFT) flow knowledge
- Experience with Low power design closure UPF based implementation.
- Knowledge of Timing .lib generation.
- Prior experience with Synopsys tools and flows is a major plus.
- Proficiency in semiconductor device physics and transistor characteristics.
- Responsible for the technical issues in projects running with the team members and guide them to resolve the issues.
Job Requirements
- B.Sc. or M.Sc. in Electronics Engineering
- Experience in ASIC physical design.
- Knowledge of Physical design implementation (floor-planning, Placement, Routing, CTS, STA) in advanced technologies is a plus.
- Experience in ASIC Physical Design RTL to GDSII Implementation flow.
- Experience working on complex PHYs and related Sub Systems
- V. Good communications skills.
- Self-driven and Motivated.
- Oral and written fluency in English